1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device, which is an integrated circuit including a light receiver, formed on a semiconductor substrate. In particular, the present invention relates to a semiconductor integrated circuit device having an open part formed by etching an interlayer insulating film layered on the substrate, and to a method for manufacturing the semiconductor integrated circuit device.
2. Description of the Related Art
In recent years, optical disks such as CDs (compact disks) and DVDs (digital versatile disks) have come to occupy an important position as information recording media. In devices for reading these optical disks, laser light is emitted along tracks on the optical disk, and the light reflected is detected by an optical pickup mechanism. Recorded data is then read based on changes in the intensity of the reflected light.
FIG. 1 is a schematic plan view of a conventional light detector 10.
FIG. 2 is a schematic cross-sectional view of the light detector 10 in a cross section that passes through the line A-A′ shown in FIG. 1 and is perpendicular to the semiconductor substrate, and shows a light receiver 11 and wiring structures 12.
In order to detect reflected light, the light detector 10 has a light receiver 11 including PIN photo diode (PD) diffusion layers 34 divided into four partitions in a 2 by 2 configuration on a front surface of a semiconductor substrate 14. The PD diffusion layers 34 are divided each other by a dividing diffusion layer 33. The light receiver 11 generates weak photoelectric conversion signals in accordance with reflected incident laser light. The signals are amplified in amplifiers formed on a peripheral region of the light receiver, and are output to a signal processing circuit downstream.
A first interlayer insulating film 16, a first metallic layer 17, a second interlayer insulating film 18, a second metallic layer 19, and a third interlayer insulating film 20 are layered in the stated order onto the semiconductor substrate 14. The first metallic layer 17 and second metallic layer 19 are both formed from, e.g., aluminum (Al) and are patterned using a photolithographic technique. Wiring structures 12 and signal wires 13A and voltage application wires 13B, which are connected to the wire structure 12, are formed by the patterned first metallic layer 17.
The dividing diffusion layer 33 is connected to the voltage application wires 13B via the wiring structures 12, and the electrical potential is kept fixed by the voltage application wires 13B. The photoelectric conversion signal generated by the PD diffusion layer 34 is retrieved by the signal wires 13A via the wiring structures 12.
In the above-described configuration, retaining the frequency characteristics of the photoelectric conversion signal and minimizing the superposition of noise on the photoelectric conversion signal requires low resistance in the electrical connections between the PD diffusion layer 34 and signal wires 13A and between the dividing diffusion layer 33 and the voltage application wires 13B. The wiring structures 12 and the diffusion layers are therefore preferably connected by as many contact structures as possible. For this reason, the wiring structures 12 are disposed along an edge of a planar shape having corners that surrounds the light receiver 11, as shown in FIG. 1.
In order to increase the efficiency of the incidence of light on the light receiver 11, once the metallic layers and interlayer insulating films have been layered onto the semiconductor substrate, the interlayer insulating films and the like layered on the light receiver 11 are etched, and an open part 15 is formed. The open part 15 is formed into a shape that is similar to and somewhat smaller than the shape of the wiring structure 12.
FIG. 3 is a perspective view showing the light receiver 11 and wiring structures 12 of the conventional light detector 10. The wiring structures 12 are disposed so as to surround the light receiver 11 in a shape having corner parts, as shown in FIG. 3. Specifically, the wiring structures 12 are disposed on the PD diffusion layer 34 and on the dividing diffusion layer 33. The wiring structures 12 on the PD diffusion layer 34 and the wiring structures 12 on the dividing diffusion layer 33 are disposed along sides of the rectangular shape that are at right angles to each other. The corner parts sandwiched by the wiring structures 12 on two adjacent sides are formed in the vicinity of apexes of the rectangular shape.
FIG. 4 is a schematic view of a surface of a wafer 21 when the interlayer insulating film on the wiring structures 12 is formed from SOG (spin on glass). A plurality of the light detectors 10 is formed on the wafer 21. The plurality of rectangular regions on the wafer 21 each indicate a light receiver 11 surrounded by the wiring structures 12 in the light detector 10. FIG. 4 shows differences in the thickness of the SOG film within the light receiver 11. In the light receiver 11, the SOG film is thicker in the regions indicated by the lattice pattern than in regions indicated by the solid color.
As is commonly understood, a smooth silicon oxide film is formed by spin coating and baking a glass solution composed of an SOG film dissolved in an organic solvent.
The SOG film is thicker in the regions of the corner parts of the wiring structures 12 in the light receiver 11 than in the region at a center part of the light receiver 11 due to the effects of the surface tension of the organic solvent on the wiring structures 12. In a single wafer 21, the SOG film is thicker at the corner parts of the light receivers 11 formed on outer peripheral sides than at those of the light receivers 11 formed on the central part of the wafer 21 due to a centrifugal force created by spin coating. In addition, when a further interlayer insulating film is sequentially layered onto the interlayer insulating film formed by the SOG film, the uppermost surface of the interlayer insulating film does not have a flat form.
Once the interlayer insulating film has been formed, when the interlayer insulating films and the like layered on the light receiver 11 are removed by anisotropic etching to form the open part 15, the bottom surface of the open part 15 is given the same shape as the surface of the third interlayer insulating layer 20 prior to etching. In other words, the thickness of the interlayer insulating films remaining on the light receiver 11 is greater in regions near the corner parts of the wiring structures 12 than at the center part of the light receiver 11.
Thus, when the bottom surface of the open part is not formed in a flat manner, a possibility exists that the efficiency of incidence on the surface of the light receiver cannot be made uniform. A possibility also exists that the portions where the bottom surface of the open part is not flat will reflect light and thereby adversely affect photoelectric conversions made by the light detector.
Japanese Laid-open Patent Application Publication No. 2001-60713 discloses the light detector that is the prior art of the invention of the present application.